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目录
8 Multiplexers
8.1 2-to-1 multiplexers
8.2 2-to-1 bus multiplexers
8.3 9-to-1 multiplexer
8.4 256-to-1 multiplexer
8.5 256-to-1 4-bit multiplexer
9 Arithmetic Circuits
9.1 Half adder
9.2 Full adder
9.3 3-bit binary adder
9.4 Adder
9.5 Signed addition overflow
9.6 100-bit binary adder
9.7 4-digit BCD adder
10 Karnaugh Map to Circuit
10.1 3-variable
10.2 4-variable
10.3 4-varible
10.4 4-varible
10.5 Minimum SOP and Pos
10.6 Karnaugh map
10.7?Karnaugh map
10.8 K-map implemented with a multiplexer
8 Multiplexers
8.1 2-to-1 multiplexers
module top_module(a,
b,
sel,
out
);
input a,b;
output out;
assign out=sel?b:a;
endmodule
8.2 2-to-1 bus multiplexers
module top_module(a,
b,
sel,
out
);
input [99:0]a,b;
input sel;
output[99:0]out;
assign out=sel?b:a;
endmodule
8.3 9-to-1 multiplexer
module top_module(a,
b,
c,
d,
e,
f,
g,
h,
i,
sel,
out
);
input [15:0]a,b,c,d,e,f,g,h,i;
input [3:0]sel;
output reg[15:0]out;
always @(*)begin
case(sel)
4'b0000:out=a;
4'b0001:out=b;
4'b0010:out=c;
4'b0011:out=d;
4'b0100:out=e;
4'b0101:out=f;
4'b0110:out=g;
4'b0111:out=h;
4'b1000:out=i;
default: out = 16'hffff;
endcase
end
endmodule
8.4 256-to-1 multiplexer
module top_module(in,
sel,
out
);
input [255:0]in;
input [7:0]sel;
output out;
assign out=in[sel];
endmodule
8.5 256-to-1 4-bit multiplexer
module top_module(in,
sel,
out
);
input [1023:0]in;
input [7:0]sel;
output [4:0]out;
assign out={in[sel*4+3],in[sel*4+2],in[sel*4+1],in[sel*4]};
endmodule
9 Arithmetic Circuits
9.1 Half adder
module top_module(a,
b,
cout,
sum
);
input a,b;
output cout,sum;
assign cout=a&b;
assign sum=a^b;
endmodule
9.2 Full adder
module top_module(a,
b,
cout,
sum,
cin
);
input a,b,cin;
output cout,sum;
assign cout=a&b|(a|b)&cin;
assign sum=a^b^cin;
endmodule
9.3 3-bit binary adder
module top_module(a,
b,
cout,
sum,
cin
);
input [2:0]a,b;
input cin;
output [2:0]cout,sum;
full_adder full_adder0(.a(a[0]),
.b(b[0]),
.cout(cout[0]),
.cin(cin),
.sum(sum[0])
);
full_adder full_adder1(.a(a[1]),
.b(b[1]),
.cout(cout[1]),
.cin(cout[0]),
.sum(sum[1])
);
full_adder full_adder2(.a(a[2]),
.b(b[2]),
.cout(cout[2]),
.cin(cout[1]),
.sum(sum[2])
);
endmodule
module full_adder(a,b,cin,sum,cout);
input a,b,cin;
output cout,sum;
assign sum=a^b^cin;
assign cout=a&b|(a|b)&cin;
endmodule
9.4 Adder
module top_module(x,
y,
sum
);
input [3:0]x;
input [3:0]y;
output [4:0]sum;
wire [3:0]cout;
wire [3:0]sum_1;
assign sum_1[0]=x[0]^y[0];
assign sum_1[1]=x[1]^y[1]^cout[0];
assign sum_1[2]=x[2]^y[2]^cout[1];
assign sum_1[3]=x[3]^y[3]^cout[2];
assign cout[0]=x[0]&y[0];
assign cout[1]=x[1]&y[1]|x[1]&cout[0]|y[1]&cout[0];
assign cout[2]=x[2]&y[2]|x[2]&cout[1]|y[2]&cout[1];
assign cout[3]=x[3]&y[3]|x[3]&cout[2]|y[3]&cout[2];
assign sum={cout[3],sum_1};
endmodule
9.5 Signed addition overflow
module top_module
(
input [7:0]a,b,
output [7:0]s,
output overflow
);
assign s = a+b;
assign overflow = (a[7]&&b[7]&&(~s[7]))||((~a[7])&&(~b[7])&&s[7]);
endmodule
9.6 100-bit binary adder
module top_module
(
input [99:0]a,b,
output [99:0]sum,
output cout,
input cin
);
assign {cout,sum}=a+b+cin;
endmodule
9.7 4-digit BCD adder
module top_module
(
input [15:0]a,b,
output [15:0]sum,
output cout,
input cin
);
wire cout1,cout2,cout3;
bcd_fadd u1_bcd_fadd(
.a(a[3:0]),
.b(b[3:0]),
.cin(cin),
.cout(cout1),
.sum(sum[3:0])
);
bcd_fadd u2_bcd_fadd(
.a(a[7:4]),
.b(b[7:4]),
.cin(cout1),
.cout(cout2),
.sum(sum[7:4])
);
bcd_fadd u3_bcd_fadd(
.a(a[11:8]),
.b(b[11:8]),
.cin(cout2),
.cout(cout3),
.sum(sum[11:8])
);
bcd_fadd u4_bcd_fadd(
.a(a[15:12]),
.b(b[15:12]),
.cin(cout3),
.cout(cout),
.sum(sum[15:12])
);
endmodule
10 Karnaugh Map to Circuit
10.1 3-variable
module top_module
(
input a,b,c,
output out
);
assign out = ~((~a)&(~b)&(~c));
endmodule
10.2 4-variable
module top_module
(
input a,b,c,d,
output out
);
assign out = ((~a)&(~c)&(~d)) | ((a)&(c)&(d)) | (a&(~b)&(~c)) | ((~a)&b&c) | ((~a)&(~b)&(~c)&d)|((~a)&(~b)&c&(~d));
endmodule
10.3 4-varible
module top_module
(
input a,b,c,d,
output out
);
assign out = a | ((~a)&(~b)&(c));
endmodule
10.4 4-varible
module top_module
(
input a,b,c,d,
output out
);
assign out = ((a^b)&(~(c^d))) | (~(a^b) & (c^d));
endmodule
10.5 Minimum SOP and Pos
module top_module
(
input a,b,c,d,
output out_sop,
output out_pos
);
assign out_pos = ((~a)&(~b)&c) | (c&d);
assign out_sop = ((~a)&(~b)|d)&c;
endmodule
10.6 Karnaugh map
module top_module
(
input [4:1]x,
output f
);
assign f = (x[3] & x[4]) | ((~(x[1])) & x[3] & (~x[4])) | (x[1]&x[2]&(~x[3]));
endmodule
10.7?Karnaugh map
module top_module
(
input [4:1]x,
output f
);
assign f = ((~x[2])&(~x[4])) | ((~x[1])&x[3]&x[4])|(x[2]&x[3]&x[4])|((~x[1])&x[2]&x[3]);
endmodule
10.8 K-map implemented with a multiplexer
module top_module
(
input c,d,
output [3:0]mux_in
);
assign mux_in[0] = (c ? 1'b1 : (d ? 1'b1 : 1'b0));
assign mux_in[1] = 1'b0;
assign mux_in[2] = d ? 1'b0 : 1'b1 ;
assign mux_in[3] = (c ? (d ? 1'b1 : 1'b0) : 1'b0);
endmodule
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