USART registers

1.Status register (USART_SR)

Bits 31:10 Reserved, forced by hardware to 0.

Bit 9 CTS: CTS flag

Bit 8 LBD: LIN break detection flag

Bit 7 TXE: Transmit data register empty

0: Data is not transferred to the shift register
1: Data is transferred to the shift register)

Bit 6 TC: Transmission complete

0: Transmission is not complete
1: Transmission is complete

Bit 5 RXNE: Read data register not empty

0: Data is not received
1: Received data is ready to be read.

Bit 4 IDLE: IDLE line detected

0: No Idle Line is detected
1: Idle Line is detected
Note: The IDLE bit will not be set again until the RXNE bit has been set itself (i.e. a new idle
line occurs).

Bit 3 ORE: Overrun error

0:没有溢出错误
1：检测到溢出错误

Bit 2 NE: Noise error flag

当在接收帧上检测到噪声时，该位由硬件设置。它是通过一个软件序列（先读取USART_SR寄存器，然后读取USART_DR寄存器）。
0：未检测到噪音
1：检测到噪声
注：该位不会产生中断，因为它与RXNE位同时出现它本身会生成一个中断中断，在多个缓冲区通信（如果设置了EIE位）。

Bit 1 FE: Framing error

此位由硬件在出现去同步、过多噪声或中断字符时设置被检测到。通过软件序列（对USART\U SR寄存器的读取）将其清除然后读取USART_DR寄存器）。
0:未检测到帧错误
1：检测到帧错误或中断字符
注：该位不会产生中断，因为它与RXNE位同时出现它本身会产生一个中断。如果当前正在传输的字同时导致帧错误和溢出错误，它将被传输，并且只设置ORE位。在多缓冲区通信的情况下，如果EIE位
一切就绪。

Bit 0 PE: Parity error

当接收器模式中发生奇偶校验错误时，该位由硬件设置。它是通过一个软件序列（先读取状态寄存器，然后读取USART\U DR数据登记册）。在清除PE位之前，软件必须等待设置RXNE标志。
如果USART\U CR1寄存器中的PEIE=1，则生成中断。
0:没有奇偶校验错误
1：奇偶校验错误

Data register (USART_DR)

包含接收或传输的数据字符，具体取决于是否从中读取或者写信给。数据寄存器执行双重功能（读和写），因为它由两部分组成寄存器，一个用于传输（TDR），一个用于接收（RDR）
TDR寄存器提供内部总线和输出之间的并行接口移位寄存器（见图1）。
RDR寄存器在输入移位寄存器和寄存器之间提供并行接口内部总线。
在启用奇偶校验的情况下传输时（在USART_CR1寄存器中PCE位设置为1），写入MSB的值（第7位或第8位取决于数据长度）无效，因为它被奇偶校验所取代。
在启用奇偶校验的情况下接收时，在MSB位中读取的值是接收到的奇偶校验位

Baud rate register (USART_BRR) 波特率寄存器

Control register 1 (USART_CR1)

Bit 13 UE: USART enable
Bit 12 M: Word length
Bit 11 WAKE: Wakeup method
Bit 10 PCE: Parity control enable
Bit 9 PS: Parity selection
Bit 8 PEIE: PE interrupt enable
This bit is set and cleared by software.
0: Interrupt is inhibited
1: A USART interrupt is generated whenever PE=1 in the USART_SR register
Bit 7 TXEIE: TXE interrupt enable
Bit 6 TCIE: Transmission complete interrupt enable
Bit 5 RXNEIE: RXNE interrupt enable
Bit 4 IDLEIE: IDLE interrupt enable
Bit 3 TE: Transmitter enable
Bit 2 RE: Receiver enable
Bit 1 RWU: Receiver wakeup
This bit determines if the USART is in mute mode or not. It is set and cleared by software and
can be cleared by hardware when a wakeup sequence is recognized.
0: Receiver in active mode
1: Receiver in mute mode
Note: 1: Before selecting Mute mode (by setting the RWU bit) the USART must first receive a
data byte, otherwise it cannot function in Mute mode with wakeup by Idle line detection.
2: In Address Mark Detection wakeup configuration (WAKE bit=1) the RWU bit cannot
be modified by software while the RXNE bit is set.
Bit 0 SBK: Send break

Control register 2 (USART_CR2)

Control register 3 (USART_CR3)

Guard time and prescaler register (USART_GTPR)

2.一些关于寄存器的使用

使用寄存器发送

 huart3.Instance->DR = 0x10;
while((huart3.Instance->SR & 0x40) == 0);
或者
while((huart3.Instance->SR & 0x20) == 0x20);

huart3.Instance->SR寄存器的第7位是TXE
huart3.Instance->SR寄存器的第6位是TC

串口透传

串口1接收后，用串口3发送出去

void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */
	if (__HAL_UART_GET_FLAG(&huart1, UART_FLAG_RXNE))
	{
		while((huart3.Instance->SR & 0x40) == 0);
		huart3.Instance->DR = huart1.Instance->DR;  //DR寄存器被发送后，RXNE寄存器被清空
	}
	HAL_GPIO_TogglePin(led_GPIO_Port, led_Pin);
  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
  /* USER CODE BEGIN USART1_IRQn 1 */
  //  HAL_UART_Receive_IT(&huart1, &usart1_rx, 1);
  //DR寄存器被发送后，RXNE寄存器被清空，中断自动打开
  /* USER CODE END USART1_IRQn 1 */
}