| |
|
开发:
C++知识库
Java知识库
JavaScript
Python
PHP知识库
人工智能
区块链
大数据
移动开发
嵌入式
开发工具
数据结构与算法
开发测试
游戏开发
网络协议
系统运维
教程: HTML教程 CSS教程 JavaScript教程 Go语言教程 JQuery教程 VUE教程 VUE3教程 Bootstrap教程 SQL数据库教程 C语言教程 C++教程 Java教程 Python教程 Python3教程 C#教程 数码: 电脑 笔记本 显卡 显示器 固态硬盘 硬盘 耳机 手机 iphone vivo oppo 小米 华为 单反 装机 图拉丁 |
-> 嵌入式 -> PCB Layout Stackup setting -> 正文阅读 |
|
[嵌入式]PCB Layout Stackup setting |
REF:Stackup for 4,6,8 layers Multi-layer laminated structureThe following is the usual stackup information(4,6,8 layer PCB standard stackup), which also can be used as stackup of impedances. 4-layer PCB standard stackup
6-layer PCB standard stackup
? 8-layer PCB standard stackup? ? 10-layer PCB standard stackup
???????? Stack-up for FPCFlex - PCB Prototype the Easy Way - PCBWay The following is the usual FPC stackup information. If you need custom FPC stackup, please make note and we will manufacture according to your requirement. ? ? 4 layer rigid-flex FPC stackup 6 layer FPC stackup 8 LAYER PCB STANDARD STACKUP TECHNIQUES AND DESIGN CHALLENGES8 Layer PCB Standard Stackup Techniques and Design Challenges Type 1
As you can see, there are four signal layers, two ground planes, and power planes on this stackup. The power and ground planes separate the signal layers. In this type of stackup, all signal layers have at least one power plane. The ground and power planes offer great inter plane capacitance. If the power islands on your system are close to the bottom layer, they can’t ground capacitance. Furthermore, the return path for the high-speed signals in signal 4 is the power plane. Type 2
In this type of stackup, the planes are moved to the center. This arrangement helps you have a tightly coupled power and ground plane pair. It is a great arrangement that offers great signal integrity. Type 3
This configuration type helps to remove any possible crosstalk between signal 2 and signal 3. Here, the signal layers are all adjacent to planes. The layers are also coupled closely. Signal2 and Signal 3 are both buried between planes. So, the planes can serve as a shield and as such, reducing the emissions from the signal layers. This stackup arrangement features two ground planes, thereby reducing the ground impedance. Type 4
Here, the ground planes serve as the top and bottom layers. There are also three ground planes, of which two are outer layers. In this type of configuration, all routing layers are between planes. This serve as a shield for the routing layers. Getting Started with Speedstackhttps://www.polarinstruments.com/support/stackup/Speedstack_building_a_PCB_stackup.pdf ? ? PCB Stack-Uphttps://smtnet.com/library/files/upload/PCB-Stackups.pdf Part 4. Eight-Layer BoardsAn eight-layer board can be used to add two more routing layers or to improve EMC performance by adding two more planes. Although we see examples of both cases, I would say that the majority of eight layer board stack-ups are used to improve EMC performance rather than add additional routing layers. The percentage increase in cost of an eightlayer board over a six-layer board is less than the percentage increase in going from four to six layers, hence making it easier to justify the cost increase for improved EMC performance. Therefore, most eightlayer boards (and all the ones that we will concentrate on here) consist of four wiring layers and four planes. An eight-layer board provides us, for the first time, the opportunity to easily satisfy all of the five originally stated objectives. Although there are many stack-ups possible, we will only discuss a few of them that have proven themselves by providing excellent EMC performance. As stated above, eight layers is usually used to improve the EMC performance of the board, not to increase the number of routing layers. An eight-layer board with six routing layers is definitely not recommended, no matter how you decide to stack-up the layers. If you need six routing layers you should be using a ten-layer board. Therefore, an eight-layer board can be thought of as a six-layer board with optimum EMC performance. The basic stack-up of an eight-layer board with excellent EMC performance is shown in Fig 9. ?This configuration satisfies all the objectives listed in Part 1. All signal?layers are adjacent to planes, and all the layers are closely coupled together. The high-speed signals are buried between planes, therefore the planes provide shielding to reduce the emissions from these signals. In addition the board uses multiple ground planes, thus decreasing the ground impedance. For best EMC performance and Signal Integrity, when high frequency signals change layers (e.g., from layer 4 to 5) you should add a groundto-ground via between the two ground planes, near the signal via, in order to provide an adjacent return path for the current. See "Changing Reference Planes" in Part 6 for a discussion of why this is important. The stack-up in Fig. 9 can be further improved by using some form of embedded PCB capacitance technology (e.g. Zycon Buried Capacitance) for layers 2-3 and 6-7. For more information on embedded PCB capacitance technology, see our Tech Tip on Decoupling. This approach provides a significant improvement in the high frequency decoupling and may allow the use of significantly fewer discrete decoupling capacitors. Another excellent configuration, and one of my favorite, is shown in Figure 10. This configuration is similar to that of Fig. 7 but includes two outer layer ground planes. With this arrangement all routing layers are buried between planes and are therefore shielded. ?H1 indicates the horizontal routing layer for signal 1, and V1 indicates the vertical routing layer for signal 1. H2 and V2 represent the same for signal 2. Although not commonly used this configuration also satisfies all the five objectives presented previously, and has the added advantage of routing orthogonal signals adjacent to the same plane. To understand why this is important see the section in Part 6 on Return Path Discontinuites. Typical layer spacing for this configuration might be 0.010"/0.005"/0.005"/0.20"/0.005"/0.005"/0.010" Another possibility for an eight-layer board is to modify Fig. 10 by moving the planes to the center as shown in Fig. 11. This has the advantage of having a tightly coupled power-ground plane pair at the expense of not being able to shield the traces. This is basically an eight-layer version of Fig. 7. It has all the advantages listed for Fig. 7, plus a tightly coupled power-ground plane pair in the center.? Typical layer spacing for this configuration might be 0.006"/0.006"/0.015"/0.006"/0.015"/0.006"/0.006." This configuration satisfies objectives 1 and 2, 3, and 5, but not 4. This is an excellent performing configuration with good signal intergity and is often preferred over the stack-up of Figure 10 because of the tightly coupled power/ground planes. One of my favorites. The stack-up in Fig. 11 can be further improved by using some form of embedded PCB capacitance technology (e.g. Zycon Buried Capacitance) for layers 4-5. There is very little EMC advantage to use a board with more than eight layers. More that eight layers is usually used only when additional layers are required for signal trace routing. If six routing layers are needed, a ten-layer board should be used. |
|
嵌入式 最新文章 |
基于高精度单片机开发红外测温仪方案 |
89C51单片机与DAC0832 |
基于51单片机宠物自动投料喂食器控制系统仿 |
《痞子衡嵌入式半月刊》 第 68 期 |
多思计组实验实验七 简单模型机实验 |
CSC7720 |
启明智显分享| ESP32学习笔记参考--PWM(脉冲 |
STM32初探 |
STM32 总结 |
【STM32】CubeMX例程四---定时器中断(附工 |
|
上一篇文章 下一篇文章 查看所有文章 |
|
开发:
C++知识库
Java知识库
JavaScript
Python
PHP知识库
人工智能
区块链
大数据
移动开发
嵌入式
开发工具
数据结构与算法
开发测试
游戏开发
网络协议
系统运维
教程: HTML教程 CSS教程 JavaScript教程 Go语言教程 JQuery教程 VUE教程 VUE3教程 Bootstrap教程 SQL数据库教程 C语言教程 C++教程 Java教程 Python教程 Python3教程 C#教程 数码: 电脑 笔记本 显卡 显示器 固态硬盘 硬盘 耳机 手机 iphone vivo oppo 小米 华为 单反 装机 图拉丁 |
360图书馆 购物 三丰科技 阅读网 日历 万年历 2024年11日历 | -2024/11/26 3:38:44- |
|
网站联系: qq:121756557 email:121756557@qq.com IT数码 |