[系统运维]zynq操作系统 ： Linux下LHB155304测试用例

前言

??第一种情况的改进和第三种情况，都可以在应用层来做
??比如我们可以设置快速读写模式fastmode，在应用层调用这个函数open时，配置寄存器屏蔽掉其他子地址的中断，直接源头上减少信号量，提升操作系统处理效率，退出时在close，恢复正常的配置，以免影响其他业务流程使用
??而高频率数据偶尔出现的读写错误，处理PL测对读写时序的修改，也可以通过多读几次数据判断筛选，大大降低错误概率，（目前没有发现过规避后的出错，但是源头上还是需要在FPGA部分更改读写时序）
??另外还有个驱动开发时需要注意的是：在接收到命令字之后，由于1553B特殊的机制，我们可以判断收发标志位，有区别的是，收到接收命令后再去做根据数据指针（芯片内部指针，不是编程创建的）做接收处理是完全没有问题的，但是如果收到的是发送命令，BC会在第一时间将对应子地址下的数据拿走，想根据收发标志去做发送处理的判断是完全来不及的，需要我们清楚的熟悉业务流程，在需要的时候提前填好数据，以便收到发送消息时可以让BC设备拿走正确的数据

1553test.c

#include <stdio.h>
#include <unistd.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <stdlib.h>
#include <string.h>
#include <signal.h>
#include <pthread.h>
#include "rt.h"
static int fd;

unsigned int commandWord[8]={0};
void Xil_Out32(unsigned int * Addr, unsigned int Value)
{
	volatile unsigned int *LocalAddr = (volatile unsigned int *)Addr;
	*LocalAddr = Value;
}

void Delay()
{
unsigned int n=1000;
while(n--);
}
unsigned int MEM_Read(unsigned int BaseAddress,unsigned int RegOffset)             
  {
    unsigned int temp[3]= {0};
    temp[0] = Xil_In32((BaseAddress) + (RegOffset));
    Delay();
    temp[1] = Xil_In32((BaseAddress) + (RegOffset));
    Delay();
    temp[2] = Xil_In32((BaseAddress) + (RegOffset));

    if(temp[0] == temp[1])
      {
        return temp[0];
      }
    else if(temp[0] == temp[2] )
      {
        return temp[0];
      }
    else if(temp[1] == temp[2])
      {
        return temp[1];
      }
 
    else
      {
        return 0xFFFF;
      }
}

 unsigned int * Xil_In32(unsigned int * Addr)
{
	return *(volatile unsigned int *) Addr;
}
int rt1553open()
{
    int mem_fd = open("/dev/mem", O_RDWR | O_SYNC);
    if (mem_fd < 0) {
        printf("can not open /dev/mem \n");
        return (-1);
    }   
    printf("/dev/mem is open \n");
    rt1553B_map_base0 = mmap(NULL, 4096 * 4, PROT_READ | PROT_WRITE, MAP_SHARED, mem_fd, XPAR_BRAM_0_BASEADDR);
    rt1553B_map_base1 = mmap(NULL, 4096 * 4, PROT_READ | PROT_WRITE, MAP_SHARED, mem_fd, MEM_BASEADDR);
    if (rt1553B_map_base0 == 0 || rt1553B_map_base1 == 0) { 
        printf("NULL pointer\n");
    }   
    else {
        printf("mmap successful\n");
    } 
    // Xil_Out32(rt1553B_map_base0+68,1);//fangwen mem
    close(mem_fd);
    return 0;
}
void  fastenable(void)
{
  Xil_Out32(rt1553B_map_base0 + 68, 0);
  RT_WriteReg(rt1553B_map_base1, 0x00, 0x0010);  
  Xil_Out32(rt1553B_map_base1 + 68, 1);
  MEM_Write(rt1553B_map_base1, (0x01A3) * 4, 0x4200); //子地址 3：所有消息类型使用单消息管理机制，tr产生中断
  MEM_Write(rt1553B_map_base1, (0x01A4) * 4, 0x4200); //子地址 4：所有消息类型使用单消息管理机制，tr生中断
  MEM_Write(rt1553B_map_base1, (0x01A5) * 4, 0x4200); //子地址 5：所有消息类型使用单消息管理机制，tr产生中断
  MEM_Write(rt1553B_map_base1, (0x01A6) * 4, 0x0000); //子地址 6：所有消息类型使用单消息管理机制，不产生中断
  MEM_Write(rt1553B_map_base1, (0x01A7) * 4, 0x0000); //子地址 7：所有消息类型使用单消息管理机制，不产生中断
  MEM_Write(rt1553B_map_base1, (0x01A8) * 4, 0x0000); //子地址 8：所有消息类型使用单消息管理机制，不产生中断
  MEM_Write(rt1553B_map_base1, (0x01A9) * 4, 0x0000); //子地址 9：所有消息类型使用单消息管理机制，不产生中断
  MEM_Write(rt1553B_map_base1, (0x01AA) * 4, 0x0000); //子地址 10：所有消息类型使用单消息管理机制，不产生中断
  MEM_Write(rt1553B_map_base1, (0x01AB) * 4, 0x0000); //子地址 11：所有消息类型使用单消息管理机制，不产生中断
  MEM_Write(rt1553B_map_base1, (0x01AC) * 4, 0x0000); //子地址 12：所有消息类型使用单消息管理机制，不产生中断

}
void  fastdisable(void)
{
  Xil_Out32(rt1553B_map_base0 + 68, 0);
  RT_WriteReg(rt1553B_map_base1, 0x00, 0x0037);  
  Xil_Out32(rt1553B_map_base0 + 68, 1);
  MEM_Write(rt1553B_map_base1, (0x01A3) * 4, 0x0000); //子地址 3：所有消息类型使用单消息管理机制，不产生中断
  MEM_Write(rt1553B_map_base1, (0x01A4) * 4, 0x0000); //子地址 4：所有消息类型使用单消息管理机制，不产生中断
  MEM_Write(rt1553B_map_base1, (0x01A5) * 4, 0x0000); //子地址 5：所有消息类型使用单消息管理机制，不产生中断
  MEM_Write(rt1553B_map_base1, (0x01A6) * 4, 0x0000); //子地址 6：所有消息类型使用单消息管理机制，不产生中断
  MEM_Write(rt1553B_map_base1, (0x01A7) * 4, 0x0000); //子地址 7：所有消息类型使用单消息管理机制，不产生中断
  MEM_Write(rt1553B_map_base1, (0x01A8) * 4, 0x0000); //子地址 8：所有消息类型使用单消息管理机制，不产生中断
  MEM_Write(rt1553B_map_base1, (0x01A9) * 4, 0x0000); //子地址 9：所有消息类型使用单消息管理机制，不产生中断
  MEM_Write(rt1553B_map_base1, (0x01AA) * 4, 0x0000); //子地址 10：所有消息类型使用单消息管理机制，不产生中断
  MEM_Write(rt1553B_map_base1, (0x01AB) * 4, 0x0000); //子地址 11：所有消息类型使用单消息管理机制，不产生中断
  MEM_Write(rt1553B_map_base1, (0x01AC) * 4, 0x0000); //子地址 12：所有消息类型使用单消息管理机制，不产生中断

}

unsigned int rt1553B_rcv()
{
  unsigned int tempVar = 0;
  unsigned int read_tmp=0;
  memset(rt1553B_BUMSG.data, 0, sizeof(rt1553B_BUMSG.data));

  if (!rt1553B_BUMSG.dataCntModeCode)
  {
    tempVar = 0x20; 
    printf("**********32*************\n");
  }    
  else
  {
    tempVar = rt1553B_BUMSG.dataCntModeCode;
    printf("**********tempVar is %d*************\n",tempVar);
  }
  Xil_Out32(rt1553B_map_base0 + 68, 1);  //fangwen mem
  for (int i = 0; i < tempVar; i++)
  {
    //read_tmp= MEM_Read(rt1553B_map_base1, (rt1553B_BUMSG.dataBlockPointer + i) * 4);
    //rt1553B_BUMSG.data[i*2]=read_tmp&0x00ff;
    //rt1553B_BUMSG.data[i*2+1]= (read_tmp&0xff00)>>8;

    rt1553B_BUMSG.data[i]= MEM_Read(rt1553B_map_base1, (rt1553B_BUMSG.dataBlockPointer + i) * 4);
  }
  //for (int i = 0; i < 64; i++)
  for (int i = 0; i < 32; i++)
  {
    printf(" rcv 32word data %d is 0x%x\r\n",i, rt1553B_BUMSG.data[i]);
  }
   memset(rt1553B_BUMSG.data, 0, sizeof(rt1553B_BUMSG.data));
  //return tempVar*2;
  return tempVar;
  } 

  unsigned int rt1553B_send(unsigned char *buf,int send_len,unsigned char subaddr)
  {
      unsigned int send_tmp=0;
      Xil_Out32(rt1553B_map_base0 + 68, 1); //fangwen mem
      usleep(10);
      printf("subaddr is %d",subaddr);
      switch (subaddr)
    {
      case BusCheckRespAddr:
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x400 + i) * 4, send_tmp);
        }
      break;
      case SelfCheckAndUpdateCtrlRespAddr:
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x440 + i) * 4, send_tmp);
        }
      break;
      case StatusCheckAndUpdateDataGroupRespAddr:
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x480 + i) * 4, send_tmp);
        }
      break;
      case UpdateBlock1Addr:
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x4C0 + i) * 4, send_tmp);
        }
      break;
      case UpdateBlock2Addr:
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x500 + i) * 4, send_tmp);
        }
      break;
      case EndecryptRespAndUpdateBlock3Addr :
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x540 + i) * 4, send_tmp);
        }
      break;
      case UpdateBlock4Addr:
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x580 + i) * 4, send_tmp);
        }
      break;
      case DdChannelSetRespAndUpdateBlock5Addr:
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x5C0 + i) * 4, send_tmp);
        }
      break;
      case UpdateBlock6Addr:
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x600 + i) * 4, send_tmp);
        }
      break;
      case UpdateBlock7Addr:
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x640 + i) * 4, send_tmp);
        }
      break;
      case UpdateBlock8Addr:
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x680 + i) * 4, send_tmp);
        }
      break;
      case TransBookRespAddr:
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x700 + i) * 4, send_tmp);
        }
      break;
      case DjChannelSetRespSysSetAddr:
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x780 + i) * 4, send_tmp);
        }
      break;
      case DxChannelSetRespAddr:
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x840 + i) * 4, send_tmp);
        }
      break;
      case ForwardDataG2Addr:
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x880 + i) * 4, send_tmp);
        }
      break;
      case DjChannelSetRespSelfCheckAddr:
        for (int i = 0; i < send_len; i++)
        {
          send_tmp=((unsigned int)buf[i*2])| (((unsigned int)buf[i*2+1])<<8);
          MEM_Write(rt1553B_map_base1, (0x8C0 + i) * 4, send_tmp);
        }
      break;
    default:
      break;
    }
      
     return 0;
  }

static void  RT_signal_func(int signum)

{
    //int command=0;
    int rcv_len;
    int status;
    // printf("before read signal\n");
    // status = read(fd,&rt1553B_BUMSG,sizeof(rt1553B_BUMSG));
    // printf("read is %d\n");
    // read(fd,commandWord,sizeof(commandWord));
    printf("*********demo command is 0x%x*******************\n",rt1553B_BUMSG.commandWord);
    rt1553B_BUMSG.remoteTerminalAddr = (rt1553B_BUMSG.commandWord >> 11) & 0x1f; //远程终端地址
    rt1553B_BUMSG.tr = (rt1553B_BUMSG.commandWord >> 10) & 0x01;                 //(=0收=1发)
    rt1553B_BUMSG.subAddModeCode = (rt1553B_BUMSG.commandWord >> 5) & 0x1f;      //字地址/方式指令
    rt1553B_BUMSG.dataCntModeCode = (rt1553B_BUMSG.commandWord) & 0x1f;          //数据字指令/方式指令
    // INT = rt1553B_BUMSG.tr;
    switch (rt1553B_BUMSG.tr)
    {
    case BURX:
      rcv_len = rt1553B_rcv();
      printf("rcv length is 0x%x\r\n", rcv_len);
      break;
    case BUTX:
          printf("************INPUT  send**********************\n");

      break;
    default:
      break;
    }
    
}
// void data_fun(void *arg)
// {
//   int rcv_len;
  
//       printf("*********  command is 0x%x*******************\n",rt1553B_BUMSG.commandWord);
//       // rt1553B_BUMSG.remoteTerminalAddr = (rt1553B_BUMSG.commandWord[i] >> 11) & 0x1f; //远程终端地址
//       // rt1553B_BUMSG.tr = (rt1553B_BUMSG.commandWord[i] >> 10) & 0x01;                 //(=0收=1发)
//       // rt1553B_BUMSG.subAddModeCode = (rt1553B_BUMSG.commandWord[i] >> 5) & 0x1f;      //字地址/方式指令
//       // rt1553B_BUMSG.dataCntModeCode = (rt1553B_BUMSG.commandWord[i]) & 0x1f;          //数据字指令/方式指令
//       // // INT = rt1553B_BUMSG.tr;
//       switch (rt1553B_BUMSG.tr)
//       {
//       case BURX:
//         rcv_len = rt1553B_rcv();
//         printf("rcv length is 0x%x\r\n", rcv_len);
//         break;
//       case BUTX:
//             printf("************INPUT  send**********************\n");

//         break;
//       default:
//         break;
      
//       }
// }
int main(void)
{
    //int command;
    int flags = 0;
    int err;
    //pthread_t deal_data;
    rt1553open();
    // fastenable();

    fd = open("/dev/1553drv", O_RDWR);
    if(fd < 0) {
        printf("*********open fail************\n");
        return -1;
    }
    
    signal(SIGIO, RT_signal_func);
    fcntl(fd, F_SETOWN, getpid()); // 将当前进程的进程号告诉给内核
    flags = fcntl(fd, F_GETFD); // 获取当前的进程状态
    fcntl(fd, F_SETFL, flags | FASYNC); // 设置进程启用异步通知功能

    // err=pthread_create(&deal_data, NULL, &data_fun,NULL);
    //   if(err != 0)
    //   {
    //     printf("pthreadrx_create fail\n");
    //     return -1;
    //   }

    while(1)
    {
        sleep(1);
    }
    
    return 0;
}
// int main ()
// {
//   rt1553open();
//   readmemtest();
//   return 0;
// }

// int showmem()
// {
//   int Status;
//   int i;
//   Xil_Out32(rt1553B_map_base0+68,1);//fangwen mem
//   for (i = 0;i < 8;i++)
//   {
//     Status = RT_ReadReg(rt1553B_map_base1,(0x480+i)*4);
//     printf("addr4 %d value is 0x%x\n",i,Status);

//   }
//     for (i = 0;i <28;i++)
//   {
//     Status = RT_ReadReg(rt1553B_map_base1,(0x4C0+i)*4);
//     printf("addr5 %d value is 0x%x\n",i,Status);
//   }
//   for (i = 0;i <28;i++)
//   {
//     Status = RT_ReadReg(rt1553B_map_base1,(0x500+i)*4);
//     printf("addr6 %d value is 0x%x\n",i,Status);
//   }
//     for (i = 0;i <28;i++)
//   {
//     Status = RT_ReadReg(rt1553B_map_base1,(0x540+i)*4);
//     printf("addr7 %d value is 0x%x\n",i,Status);
//   }
//   for (i = 0;i <28;i++)
//   {
//     Status = RT_ReadReg(rt1553B_map_base1,(0x580+i)*4);
//     printf("addr8 %d value is 0x%x\n",i,Status);
//   }
//     for (i = 0;i <28;i++)
//   {
//     Status = RT_ReadReg(rt1553B_map_base1,(0x5C0+i)*4);
//     printf("addr9 %d value is 0x%x\n",i,Status);
//   }
//   for (i = 0;i <28;i++)
//   {
//     Status = RT_ReadReg(rt1553B_map_base1,(0x600+i)*4);
//     printf("addr10 %d value is 0x%x\n",i,Status);
//   }
//     for (i = 0;i <28;i++)
//   {
//     Status = RT_ReadReg(rt1553B_map_base1,(0x640+i)*4);
//     printf("addr11 %d value is 0x%x\n",i,Status);
//   }
//   for (i = 0;i <28;i++)
//   {
//     Status = RT_ReadReg(rt1553B_map_base1,(0x680+i)*4);
//     printf("addr12 %d value is 0x%x\n",i,Status);
//   }
// }


/*
int showmem()
{
  int Status;
  int i;
  Xil_Out32(rt1553B_map_base0+68,1);//fangwen mem
  for (i = 0;i < 8;i++)
  {
    int j=0;
    for(j=0;j<2;j++)
    {
      Status = RT_ReadReg(rt1553B_map_base1,(0x480+i)*4);
      if(j==2)
      {
          printf("addr4 %d value is 0x%x\n",i,Status);
      }
      
    }
  }
    for (i = 0;i <28;i++)
  {
    Status = RT_ReadReg(rt1553B_map_base1,(0x4C0+i)*4);
    printf("addr5 %d value is 0x%x\n",i,Status);
      Delay();
  }
  for (i = 0;i <28;i++)
  {
    Status = RT_ReadReg(rt1553B_map_base1,(0x500+i)*4);
    printf("addr6 %d value is 0x%x\n",i,Status);
      Delay();
  }
    for (i = 0;i <28;i++)
  {
    Status = RT_ReadReg(rt1553B_map_base1,(0x540+i)*4);
    printf("addr7 %d value is 0x%x\n",i,Status);
      Delay();
  }
  for (i = 0;i <28;i++)
  {
    Status = RT_ReadReg(rt1553B_map_base1,(0x580+i)*4);
    printf("addr8 %d value is 0x%x\n",i,Status);
      Delay();
  }
    for (i = 0;i <28;i++)
  {
    Status = RT_ReadReg(rt1553B_map_base1,(0x5C0+i)*4);
    printf("addr9 %d value is 0x%x\n",i,Status);
      Delay();
  }
  for (i = 0;i <28;i++)
  {
    Status = RT_ReadReg(rt1553B_map_base1,(0x600+i)*4);
    printf("addr10 %d value is 0x%x\n",i,Status);
    Delay();
  }
    for (i = 0;i <28;i++)
  {
    Status = RT_ReadReg(rt1553B_map_base1,(0x640+i)*4);
    printf("addr11 %d value is 0x%x\n",i,Status);
    Delay();
  }
  for (i = 0;i <28;i++)
  {
    Status = RT_ReadReg(rt1553B_map_base1,(0x680+i)*4);
    printf("addr12 %d value is 0x%x\n",i,Status);
    Delay();
  }
}
*/
/*
int readmemtest()
{
  int Status1,Status2,Status3,Status4;
  int i = 0,cnterror = 0,cntok = 0;
  Xil_Out32(rt1553B_map_base0+68,1);//fangwen mem
  
  sleep(1);
  for (i = 0;i < 10000000;i++)
  {
      RT_WriteReg(rt1553B_map_base1,0x1A8*4,0x4200);
      RT_WriteReg(rt1553B_map_base1,0x1A9*4,0x4100);
      RT_WriteReg(rt1553B_map_base1,0x480*4,0xf102);
      RT_WriteReg(rt1553B_map_base1,0x481*4,0xf103);
      Status1 = RT_ReadReg(rt1553B_map_base1,0x1A8*4);
      Status2 = RT_ReadReg(rt1553B_map_base1,0x1A9*4);
      Status3 = RT_ReadReg(rt1553B_map_base1,0x480*4);
      Status4 = RT_ReadReg(rt1553B_map_base1,0x481*4);
      if(Status1 != 0x4200)
      {
          cnterror++;
          printf("read error %d! error value is 0x%x,error cnt is%d\n",i,Status1,cnterror);
      }
      
      if(Status2 != 0x4100)
      {
          cnterror++;
          printf("read error %d! error value is 0x%x,error cnt is%d\n",i,Status2,cnterror);
      }
      if(Status2 != 0xf102)
      {
          cnterror++;
          printf("read error %d! error value is 0x%x,error cnt is%d\n",i,Status3,cnterror);
      }
      if(Status2 != 0xf103)
      {
          cnterror++;
          printf("read error %d! error value is 0x%x,error cnt is%d\n",i,Status4,cnterror);
      }
      
        cntok ++;
        
       //printf("%d read ok,value is 0x%x\n",i,Status); 
  }   
  if(cntok == 10000000)
        printf("10000000 success\n");
}
*/

rt.h

#ifndef __RT_H_
#define __RT_H_

#include <stdio.h>
#include <unistd.h>
#include <sys/mman.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>

/* 
 *Define all register macros
 *Some commonly used judgment values
 */
#define BUINTMASK                       0x0              //reg0
#define BUCFG1                          0x1
#define BUCFG2                          0x2
#define BURST                           0x3
#define BUCMDSTACKPOINT                 0x3
#define BURTSUBADDRCTRL                 0x4
#define BUTIMETAG                       0x5
#define BUINTSTATUS                     0x6
#define BUCFG3                          0x7
#define BUCFG4                          0x8
#define BUCFG5                          0x9
#define BURTDATASTACKADDR               0xa
#define BUBCFRAMETIME                   0xb
#define BUBCTIMEREMAIN                  0xc
#define BURTLASTCMD                     0xd
#define BURTSTATUSWORD                  0xe
#define BURTBITWORD                     0xf
#define BUTSTMODE0                      0x10
#define BUTSTMODE1                      0x11
#define BUTSTMODE2                      0x12
#define BUTSTMODE3                      0x13
#define BUTSTMODE4                      0x14
#define BUTSTMODE5                      0x15
#define BUTSTMODE6                      0x16
#define BUTSTMODE7                      0x17            //reg17
#define BUMSGDATANUM                    0x20            //1553 message data size 32
#define BUCHANNELA                      0x0
#define BUCHANNELB                      0x1
#define BURX                            0x0
#define BUTX                            0x1
#define ERR1                            0x0
#define ERR3                            0x1
#define ERR                             0x2
#define OK                              0x0
#define INTMASK                         0x0
#define BUM400                          0x400           //data block 13  
#define BUM800                          0x800           //data block 37  
#define BUZERO                          0x0




//#define BUMSGDATANUM                    0x40            //1553 message data size 32 word
#define BUMSGDATANUM                    0x20




#define BUSUBADDR0                      0x0
#define BUSUBADDR31                     0x20            //1553 subaddress 31
#define BUMSGBUFSIZE                    0x40            //1553 message buffer size 64

#define BUEOMINT                        0x1             //
#define BUMSGBUFBGN                     0x0             //1553 message buffer begin 0
#define BusCheckRespAddr                      1               //subaddress
#define SelfCheckAndUpdateCtrlRespAddr        3
#define StatusCheckAndUpdateDataGroupRespAddr 4
#define UpdateBlock1Addr                      5
#define UpdateBlock2Addr                      6
#define EndecryptRespAndUpdateBlock3Addr      7
#define UpdateBlock4Addr                      8
#define DdChannelSetRespAndUpdateBlock5Addr   9
#define UpdateBlock6Addr                      10
#define UpdateBlock7Addr                      11
#define UpdateBlock8Addr                      12
#define TransBookRespAddr                     15
#define DjChannelSetRespSysSetAddr            17
#define DxChannelSetRespAddr                  21
#define ForwardDataG2Addr                     24
#define DjChannelSetRespSelfCheckAddr         26


#define XPAR_BRAM_0_BASEADDR 0x40000000                 //mem ctrl baseaddr
#define MEM_BASEADDR         0x43c00000                 //1553  baseaddr
unsigned char *rt1553B_map_base0;                               //mem ctrl baseaddr
unsigned char *rt1553B_map_base1;                               //1553  baseaddr

/* 
 *Define a structure for transmitting instructions
 */
typedef struct
    {
      unsigned int channelAB;
      unsigned int blockStatusWord;
      unsigned int timeTagWord;
      unsigned int dataBlockPointer;
      unsigned int commandWord;
      unsigned int remoteTerminalAddr;
      unsigned int tr;
      unsigned int subAddModeCode;
      unsigned int dataCntModeCode;
      //unsigned char data[BUMSGDATANUM];
      unsigned int  data[BUMSGDATANUM];
    }BUMSGIFM;
 BUMSGIFM rt1553B_BUMSG;//消息


// 
typedef struct
    {
      BUMSGIFM       buRxRPool[BUMSGBUFSIZE];
      unsigned int   buRxRPoint;
      BUMSGIFM       buRxTPool[BUMSGBUFSIZE];
      unsigned int   buRxTPoint;
    } BUBUFFER;


//A read/write operation to memory
void Xil_Out32(unsigned int * Addr, unsigned int Value);
unsigned int * Xil_In32(unsigned int * Addr);
/* 
 *To facilitate access to registers and memory, 
 *the function of pointer manipulation is conveniently peak-decorated 
*/
#define RT_WriteReg(BaseAddress, RegOffset, Data)          \
    Xil_Out32((BaseAddress) + (RegOffset), (Data))
#define RT_ReadReg(BaseAddress, RegOffset)             \
    Xil_In32((BaseAddress) + (RegOffset))

#define MEM_Write(BaseAddress, RegOffset, Data)          \
    Xil_Out32((BaseAddress) + (RegOffset), (Data))
//#define MEM_Read(BaseAddress, RegOffset)             \
 //   Xil_In32((BaseAddress) + (RegOffset))
 extern unsigned int MEM_Read(BaseAddress, RegOffset);
/*
 *Memory mapping to 1553 
 *To facilitate enablement and manipulation of registers
 *@param[in] none
 *return 0
*/
int rt1553open();
/* 
 *For the initialization configuration of registers and memory,
 *please refer to the comments for details
 *@param[in] none
 *return 0
 */
int rt1553init();
/* 
 *Print out all register values to help better determine the current state
 *@param[in] none
 *return 0
 */
int showreg(); 
/* 
 *Used to make a judgment on the receiving or sending of RT
 *In fact, the configuration is already done in the rt1553init();, 
 *and the purpose of this function is only to print the send/receive data word in the absence of BM
 *Print the data word received when the BC-RT message is received
 *RT-BC prints out the data word sent
 *@param[in] none
 *return 0
 */
unsigned int rt1553B_handle();
/* 
 *Data word reception for 1553B
 *Stores the received data word in the specified data block after the mode selection, 
 *and returns twice the received length to the protocol layer
 *@param[in] none
 *return tempVar（length）
 */
unsigned int rt1553B_rcv();
/* 
 *Data word for 1553B sending
 *The pre-set instructions are filled into the fixed data block area,
 *and the data words stored in the existing specified data block area are sent to BC 
 *at the first time when receiving the sending signal
 *@param[in] buf send buffer
 *@param[in] send_len
 *@param[in] subaddr
 *return 0
 */
unsigned int rt1553B_send(unsigned char *buf,int send_len,unsigned char subaddr);


#endif